Asynchronous Circuit Stacking for Simplified Power Management

Description:

Technology # 19-03

 

 

 

A Method for Simplified Power Management

 

The circuit architecture described in the IP disclosure form will allow low-voltage digital circuit components to be stacked and use a higher supply voltage while operating reliably, thereby reducing the number of voltage converters needed for the system and the accompanied power loss during voltage conversion, which in turn reduce the overall power consumption and enhance battery life.

 

Application(s):

 

Battery-powered or energy-harvesting electronic devices, such as mobile computing devices, distributed sensor systems, and Internet-of-Things (IoT) devices.

 

Advantage(s):

The advantages include simple implementation, reliably operation, significant power reduction at system level, and no conflict with other power optimization techniques.

 

 

Technology:

 

Method reduces the number of voltage converters needed for the system and the accompanied power loss during voltage conversion, which in turn reduce the overall power consumption and enhance battery life.

 

__________________________________________

This invention/technology is available for licensing.

For interested parties seeking further information, feel free to contact:

Mark Allen Lanoue

Technology Manager / Tech Ventures

University of Arkansas

(479) 575-7243

malanoue@uark.edu

Patent Information:
For Information, Contact:
Mark Lanoue
Technology Manager
University of Arkansas
479-575-7243
malanoue@uark.edu
Inventors:
Andres Suchanek
Zhong Chen
Jia Di
Matthew Leftwich
Keywords:
© 2020. All Rights Reserved. Powered by Inteum