Methodology for Modeling and Parameter Extraction of LDMOS Devices Under Cryogenic Conditions

Description:

A new model and parameter extraction methodology has been developed for LDMOS-based circuits that will accurately predict the response of LDMOS circuits even when subjected to the effects of extreme cold.

The new model of LDMOS circuits can accurately predict the drain current of the LDMOS IC down to a temperature of 100 Kelvin. The model is accurate across the entire temperature range from 400 Kelvin down to below 100 Kelvin with a single set of model parameters.

The invention also includes a new parameter extraction methodology that can be applied to any semiconductor device experiencing freeze-out conditions. The equation and the extraction procedure may also be used to model other non-monotonic effects in semiconductor devices such as radiation and reliability.

In order to understand how newly designed electronic circuits will behave without having to build a physical "breadboard" circuit, which is often prohibitively expensive, designers use a computer simulation program (such as SPICE) to perform a virtual test of their circuit designs. In order to perform a computer simulation of a new circuit design, each of the elements of the new circuit must have a model of its behavior that can be used by the simulation program.

The model is a mathematical description of the element that describes how the element will behave when it is a part of a new circuit to be tested. Usually the manufacturer of an integrated circuit (IC) that includes an LDMOS will also provide its customers with the mathematical model of the device for use in a simulation program. However, the model provided by the manufacturer will not always account for all of the conditions under which the IC might be required to operate.

One of the conditions that is not normally available for designers to model is a condition of extreme cold, such as is found in space. Under the effects of such extreme cold, the response of an LDMOS chip will not be predictable by the normal model provided by the manufacturer. For LDMOS circuits, below 133 Kelvin (minus 140 degrees Celsius) the drain current falls off dramatically due to a phenomenon called "freeze out".

To see and read the issued click the following link  http://vpred.uark.edu/documents/techventures/tech_docs/us8608376.pdf

To read a published paper on the invention click the following link  http://vpred.uark.edu/documents/techventures/tech_docs/ieee_paper.pdf

 

 

Patent Information:
App Type Country Serial No. Patent No. File Date Issued Date Expire Date
Non-Provisional United States 13/134,012 8,608,376 5/26/2011 12/17/2013  
For Information, Contact:
Mark Swaney
Technology Licensing Officer
University of Arkansas
479-575-7243
mswaney@uark.edu
Inventors:
Avinash Kashyap
Alan Mantooth
Keywords:
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